Many tools for end-to-end verification are powerful and productive. Yet the practice of formal verification of hardware RTL designs is mystifying: there are more builders of tools than full-time dedicated users of such tools. Surprising perhaps, except that few places teach the practical application of formal verification. Continue Reading…
On the Practice of Formal VerificationWritten by: Vigyan Singhal on November 15th, 2011
HVC 2011, December 6-8, Haifa, IsraelWritten by: philippa.slayton on November 8th, 2011
Oski to Present Paper at HVC 2011
Oski Technology is presenting a paper at HVC 2011, the seventh in the series of annual conferences dedicated to advancing the state-of the-art and state-of-the-practice in verification and testing of hardware and software.
When: Day 3 of HVC 2011, December 8, 2011, 4pm
Where: Haifa, Israel
Paper: Liveness vs. Safety – A Practical Viewpoint
Authors: B. A. Krishna (Chelsio), Jon Michelson (Cisco), Vigyan Singhal (Oski), Alok Jain (Cadence)
Visit Oski Technology at www.oskitech.com.
DVCon 2011, March 1-3, San Jose, CAWritten by: philippa.slayton on April 5th, 2011
DVCon: Oski Technology Booth at #DVCon 2011
Oski CEO Vigyan Singhal Video on Formal Verification
Oski Technology CEO Vigyan Singhal was recently interviewed at DVCon 2011 by Joe Hupcey III for Cadence’s Team Verify, a channel dedicated to formal users.
About Oski Technology
Oski Technology has over 20 years of experience in formal verification. Oski has pioneered and perfected a proprietary methodology in the Oski Abstraction Methods to deliver complete verification coverage for complex SOC designs, and used it to solve the toughest design verification problems with dramatic results: Oski’s unique formal methods have found twice as many bugs in half the verification schedule, including corner case bugs that are almost impossible to detect in a simulation environment. Oski’s customers include Cisco, Cypress, NVIDIA, Rambus, Xilinx. More information about Oski’s core services and verification solutions, is here: www.oskitech.com.
The Cadence Team Verify blog post is here: here.
Who Verifies Your Third-Party Design IP? (230KB)
Publication: IEEE CEDA Currents, July 2006
This July 2006 issue contains an article that argues that third-party design IP must be accompanied by replayable verification IP, that proves the correctness of the design through end-to-end checks. (Go to the end of the issue to find the article.)