Enabling Formal Sign-Off
Oski Launches New “Decoding Formal” Video Series at DAC 2013, Booth #718
At #DAC2013, Oski Technology will launch its exciting new “Decoding Formal” video series where CEO Vigyan Singhal shares tips and secrets on how to make the best use of formal technology in system-on-chip (SoC) design and verification. Videos will be shown hourly, starting at 9:30 a.m booth #718. Topics include:
• How to formally verify — and reuse — highly configurable IP designs
• How to know when a formal testbench is complete
• How to achieve early formal convergence with Oski Abstraction Models
Join Oski Technology at DAC 2013, booth 718. See our Abstraction Models demo, attend an Oski “Decoding Formal” reception and compete to win prizes in the live “Decoding Formal” trivia challenge competition. The two events will be held Monday, June 3, and Tuesday, June 4, from 5:15 p.m. until 6:00 p.m. in Booth #718. Alternatively, play the Oski “Decoding Formal” Online challenge, here!
Oski Live Verification Challenge Success: 4 corner-case bugs, 72 hrs on Complex NVIDIA Design
The 72-hour Oski Live Formal Verification Challenge team is celebrating success having successfully verified a complex RTL design from NVIDIA, sight unseen, live at #49DAC 2012. Oski found four corner-case bugs and wrote end-to-end checkers in 72 hrs.
- Video interviews on the Oski Verification Challenge
- Oski Challenge results and the Oski Challenge wrap-up video on the Oski blog
Oski Technology was interviewed at DVCon 2013. The Oski Challenge was not the only reason to celebrate in 2012: Oski won Best Presentation for the DAC 2012 User Track submission for “Deploying Model Checking for Bypass Verification” and was nominated for a second paper. Request this and other papers on the Oski web site.
Oski Technology, the world’s first and only 3rd party formal verification methodology service provider has redefined the traditional approach to RTL formal verification, achieving End-to-End Formal verification using a scalable formal verification methodology, reducing schedule and increasing coverage for better overall return on effort and a measurable competitive advantage. Oski Abstraction Models allow off-the-shelf EDA tools to scale, so that formal can be properly integrated with traditional simulation-based and coverage-driven flows at each stage of the verification process. Oski often finds twice as many bugs in half the time, including corner case bugs that are almost impossible to find in simulation.
Oski Abstraction Methods have achieved End-to-End Formal verification for customers including Xilinx, NVIDIA and Cisco, as covered in the poster presentation, “How Formal Methodology Shrank the Verification Schedule of a Complex Statistics Block by 6x”.
Request this Cisco presentation and other presentations and white papers, view Oski video interviews, and find more information on the Oski Cadence #DVCon 2012 tutorial “Using “Apps” to Take Formal Analysis Mainstream”. To find out more about Oski’s formal verification methodology, visit the Oski FAQ.